People Collaborating in Our Research
Co-Researchers of Dr Bishwajeet Pandey are creating a globally educational excellence without borders among the corporate researchers, research scholars, and academicians by growing of knowledge, imparting values and ethics.
- Aarushi Aggarwal, Intel, USA
- LVCMOS-Based Low-Power Thermal-Aware Energy-Proficient Vedic Multiplier Design on Different FPGAs. Advances in Intelligent Systems and Computing, 115–122. doi:10.1007/978-981-10-8533-8_12
- Stub Series Terminal Logic-Based Low-Power Thermal-Aware Vedic Multiplier Design on 40-nm FPGA. Advances in Intelligent Systems and Computing, 107–113. doi:10.1007/978-981-10-8533-8_11
- Abdelmajid Badri, Hassan II University of Casablanca, Casablanca, Morocco
- Smart Hybrid SDN Approach for MPLS VPN Management and Adaptive Multipath Optimal Routing, Wireless Personal Communications, Vol. 114, pp. 1107-1131, April 2020. https://link.springer.com/article/10.1007/s11277-020-07411-1
- Novel Approach for Management of Automated IPv6 Network Simulation, Wireless Personal Communications, Vol. 111, pp. 1487–1504, April 2020. https://link.springer.com/article/10.1007/s11277-019-06928-4
- Behavior analysis of VoIP performances in next-generation networks, International Journal of Engineering & Technology 7, no. 3.15 (2018): 353-359.
- Abhishek Jain, Thapar University, India
- "Energy Efficient and High Performance FIR Filter Design on Spartan-6FPGA" 3C Tecnologia. Special Issue, May 2019, https://www.3ciencias.com/wp-content/uploads/2019/05/eem17052019_2-1-1.pdf
- Achal Agarwal, Ajay Kumar Garg Engineering College, India
- LVCMOS-Based Low-Power Thermal-Aware Energy-Proficient Vedic Multiplier Design on Different FPGAs. Advances in Intelligent Systems and Computing, 115–122. doi:10.1007/978-981-10-8533-8_12
- Stub Series Terminal Logic-Based Low-Power Thermal-Aware Vedic Multiplier Design on 40-nm FPGA. Advances in Intelligent Systems and Computing, 107–113. doi:10.1007/978-981-10-8533-8_11
- Aditi Goyal, Chitkara University, Chandigarh, India
- "Processor Specific Data Processing Device (DPD) Design for Energy Efficient Data Center." International Journal of Energy, Information and Communications 6, no. 3 (2015): 29-38.
- Aditi Moudgil, Chitkara University, Chandigarh, India
- "SSTL Based Energy Efficient ISCAS’99 Benchmark Circuit Design on FPGA." International Journal of Energy, Information and Communications 6, no. 3 (2015): 39-46.
- “GTL Based Internet of Things Enable Processor Specific RAM Design on 65nm FPGA”, IEEE 57th International Symposium ELMAR-2015. 28-30 September 2015, Zadar, Croatia: the oldest conference in Europe. https://ieeexplore.ieee.org/document/7334514
- Aditya Yashwant, University of Oxford, UK
- IoT, Cloud and AI Enable Sensor Based Water Monitoring to Handle Water Crisis in Indian Cities, International Journal of Geoinformatics, 2024, 20(5), pp. 40–53
- Aezwani Wan Abu Bakar, Wan, Universiti Sultan Zainal Abidin, Kuala Terengganu, Malaysia
- Highly sensitive one-dimensional Dielectric-Superconductor photonic crystal structure for low temperature sensing applications, Cryogenics, 2024, 143, 103934
- IoT, Cloud and AI Enable Sensor Based Water Monitoring to Handle Water Crisis in Indian Cities, International Journal of Geoinformatics, 2024, 20(5), pp. 40–53
- Aisha Hassan Abdalla Hashim, International Islamic University Malaysia, Kuala Lumpur, Malaysia
- “Design and Evaluation of a Multihoming-Based Mobility Management Scheme to Support Inter Technology Handoff in PNEMO”, Wireless Personal Communications volume 114, pp. 133–1153, May 2020 https://link.springer.com/article/10.1007/s11277-020-07412-0
- “A Novel Artificial Intelligence Based Timing Synchronization Scheme for Smart Grid Applications” Wireless Personal Communications volume 114, pp. 1067–1084, April 2020, https://link.springer.com/article/10.1007/s11277-020-07408-w
- Aitolkyn Kulmuratova, L.N. Gumilyov Eurasian National University, Astana, Kazakhstan
- "Efficient usage of web forensics, disk forensics and email forensics in successful investigation of cyber crime", International Journal of Information Technology (Singapore), 2024, 16(6), pp. 3815–3824
- Akash Kumar, University of Hull, United Kingdom
- "Simulation of HSTL I/O standard based energy efficient frame buffer for digital image processor." In 2014 International Conference on Robotics and Emerging Allied Technologies in Engineering (iCREATE), pp. 16-20. IEEE, 2014.
- Akniyet Nurzhaubayev, Faculty of Information Technology, Eurasian National University, Astana, Kazakhstan
- Federated Learning Based Smart Horticulture and Smart Storage of Fruits Using E-Nose, and Blockchain: A Proposed Model, 2024 IEEE 3rd International Conference on AI in Cybersecurity (ICAIC), University of Houston, USA
- Ala’ A. Eshmawi, University ofJeddah, Jeddah, Saudi Arabia
- “A review on security threats, vulnerabilities, and counter measures of 5G enabled Internet-of-Medical-Things”, IET Communications, Vol. 16, No.5, pp. 421–432, 2022, https://doi.org/10.1049/cmu2.12301
- Ali Siddiqui, University of Houston-Victoria, Victoria, USA
- “Digital Healthcare System Vulnerability Analysis using Network Forensic Tool”, The International Conference on Communication Systems and Network Technologies (CSNT-2021), Bhopal, India, IEEE https://ieeexplore.ieee.org/document/9509647/
- Alisha Nagpal, Chitkara University, Chandigarh, India
- Different Configuration of Low-Power Memory Design Using Capacitance Scaling on 28-nm Field-Programmable Gate Array. Advances in Intelligent Systems and Computing, 151–161. doi:10.1007/978-981-10-8533-8_15 https://link.springer.com/chapter/10.1007/978-981-10-8533-8_15
- Amit Kant Pandit, SMVDU, India
- “Leakage power consumption of address register interfacing with different families of FPGA”, International Journal of Innovative Technology and Exploring Engineering (IJITEE), Vol. 8, Issue- 9S2, July 2019 https://www.ijitee.org/wp-content/uploads/papers/v8i9S2/I11080789S219.pdf
- "Power Efficient Frequency Scaled and Thermal-Aware Control Unit Design on FPGA", International Journal of Innovative Technology and Exploring Engineering, Volume-8 Issue-9S2, pp. 530-533, July 2019.
- Amit Yadav, Chitkara University, Chandigarh, India
- Amanpreet Sandhu, Chitkara University, Chandigarh, India
- "Frequency Scaling Based Low Power ORIYA UNICODE READER (OUR) Design ON 40nm and 28nm FPGA", International Journal of Recent Technology and Engineering (IJRTE), ISSN: 2277-3878, Volume-7, Issue-6S, March 2019
- Amanpreet Kaur, Chitkara University, Chandigarh, India
- “Design of a Power Efficient Model of PWM Generator for Green Communication using High Performance FPGAs”, International Journal of Sensors, Wireless Communications and Control, Vol. 14, No. 1, pp. 66-84, January 2024
- "SSTL Based Energy Efficient ISCAS’99 Benchmark Circuit Design on FPGA." International Journal of Energy, Information and Communications 6, no. 3 (2015): 39-46.
- “Pseudo Open Drain IO Standard Based Energy Efficient Solar Charge Sensor Design on 20nm FPGA”, 11th IEEE International Conference on Power Electronics and Drive Systems (PEDS), Sydney, Australia, 9 – 12 June 2015. https://ieeexplore.ieee.org/document/7203530
- "LVTTL Based Energy Efficient Watermark Generator Design and Implementation on FPGA", IEEE International Conference on ICT Convergence (ICTC), 22-24 October 2014, Busan, Korea, https://ieeexplore.ieee.org/document/6983240
- "Frequency Scaling Based Low Power ORIYA UNICODE READER (OUR) Design ON 40nm and 28nm FPGA", International Journal of Recent Technology and Engineering (IJRTE), ISSN: 2277-3878, Volume-7, Issue-6S, March 2019
- Amjed Abbas Ahmed, Imam Alkadhim University College, Baghdad, Iraq
- Review on Hybrid Deep Learning Models for Enhancing Encryption Techniques Against Side Channel Attacks, IEEE Access, 2024
- Aniket Ingavale, Pune University, Pune, India
- Identification of Sounds using Deep Learning with MFCC Features Extraction, IEEE AITU: Digital Generation, Conference Proceedings - AITU 2024, 2024, pp. 60–64
- Anil Kumar Budhati, UCSI University Malaysia
- An Improved Binary Spider Wasp Optimization Algorithm for Intrusion Detection for Industrial Internet of Things, IEEE Open Journal of the Communications Society, DOI: 10.1109/OJCOMS.2024.3421647
- Anirudh Khanna, Chitkara University, India
- “A Discussion about Upgrading the Quick Script Platform to Create Natural Language based IoT Systems”, 2nd International Conference on Recent Trends in Computer Science and Electronics (RTCSE), 02-03 January 2017, Kuala Lumpur, Malaysia http://rtcse.org/RTCSE_2017.pdf
- "Anatomy and utilities of an artificial intelligence conversational entity." In 2015 International Conference on Computational Intelligence and Communication Networks (CICN), pp. 594-597. IEEE, 2015.
- Anjan Kumar, GLA University Mathura, India
- Anjan Bandyopadhyay, Kalinga Institute of Industrial Technology, Bhubaneswar, India
- Automated Detection of Intracranial Hemorrhage using Convolutional Neural Networks, 2024 IEEE AITU: Digital Generation, Conference Proceedings - AITU 2024, 2024, pp. 20–26
- Combinatorial Kinetic Dualistic Auction Model for Metaverse Service Allocation, IEEE AITU: Digital Generation, Conference Proceedings - AITU 2024, 2024, pp. 27–32
- Anu Singla, Chitkara University, Chandigarh, India
- Anupam Shukla, ABV-IIITM, Gwalior, India
- Assem Konyrkhanova, Faculty of Information Technology, Eurasian National University, Astana, Kazakhstan
- Federated Learning Based Smart Horticulture and Smart Storage of Fruits Using E-Nose, and Blockchain: A Proposed Model, 2024 IEEE 3rd International Conference on AI in Cybersecurity (ICAIC), University of Houston, USA
- Ayoub Bahnasse, Hassan II University of Casablanca, Casablanca, Morocco
- “Smart Hybrid SDN Approach for MPLS VPN Management and Adaptive Multipath Optimal Routing”, Wireless Personal Communications, Vol. 114, pp. 1107-1131, April 2020. https://link.springer.com/article/10.1007/s11277-020-07411-1
- “Novel Approach for Management of Automated IPv6 Network Simulation”, Wireless Personal Communications, Vol. 111, pp. 1487–1504, April 2020. https://link.springer.com/article/10.1007/s11277-019-06928-4
- "Behavior analysis of VoIP performances in next-generation networks." International Journal of Engineering & Technology 7, no. 3.15 (2018): 353-359.
- Azana Hafizah Mohd Aman, Universiti Kebangsaan Malaysia, Bangi, Malaysia
- Review on Hybrid Deep Learning Models for Enhancing Encryption Techniques Against Side Channel Attacks, IEEE Access 2024
- Azeddine Khiat, Hassan II University of Casablanca, Casablanca, Morocco
- “Smart Hybrid SDN Approach for MPLS VPN Management and Adaptive Multipath Optimal Routing”, Wireless Personal Communications, Vol. 114, pp. 1107-1131, April 2020. https://link.springer.com/article/10.1007/s11277-020-07411-1
- “Novel Approach for Management of Automated IPv6 Network Simulation”, Wireless Personal Communications, Vol. 111, pp. 1487–1504, April 2020. https://link.springer.com/article/10.1007/s11277-019-06928-4
- "Behavior analysis of VoIP performances in next-generation networks." International Journal of Engineering & Technology 7, no. 3.15 (2018): 353-359.
- B K Sarkar, TIT, Bhopal, India
- "Performance Evaluation of Backoff Method--Effect of Backoff Factor on Exponential Backoff Algorithm." In 2013 5th International Conference and Computational Intelligence and Communication Networks, pp. 82-86. IEEE, 2013.
- Bhagwan Das, Tun Hussein Onn University of Malaysia
- Timing Constraints-Based High-Performance DES Design and Implementation on 28-nm FPGA. Advances in Intelligent Systems and Computing, 123–137. doi:10.1007/978-981-10-8533-8_13 https://link.springer.com/chapter/10.1007/978-981-10-8533-8_13
- "Technologies for effective disaster management systems: a state of the art survey of current challenges and opportunities", 3C Tecnología, Special Issue, November 2019 https://www.3ciencias.com/articulos/articulo/technologies-effective-disaster-management-systems/
- “Development of New All-Optical Signal Regeneration Technique”, Wireless Personal Communications, 95 (2), pp. 523-537, 2017. https://link.springer.com/article/10.1007/s11277-016-3907-3
- “Leakage power reduction with various IO standards and dynamic voltage scaling in vedic multiplier onvirtex-6 FPGA”, (2016) Indian Journal of Science and Technology, 9 (25), art. no. 97157, 2016. https://indjst.org/articles/leakage-power-reduction-with-various-io-standards-and-dynamic-voltage-scaling-in-vedic-multiplier-on-virtex-6-fpga
- “A Discussion about Upgrading the Quick Script Platform to Create Natural Language based IoT Systems”, 2nd International Conference on Recent Trends in Computer Science and Electronics (RTCSE), 02-03 January 2017, Kuala Lumpur, Malaysia http://rtcse.org/RTCSE_2017.pdf
- “GTL Based Internet of Things Enable Processor Specific RAM Design on 65nm FPGA”, IEEE 57th International Symposium ELMAR-2015. 28-30 September 2015, Zadar, Croatia: the oldest conference in Europe. https://ieeexplore.ieee.org/document/7334514
- “Temperature Control of Pseudo Noise Generator Based Optical Transmitter using Airflow and Heat Sink Profile at High Speed Transceiver Logic IO Standard”, Int. Conf. on Sensors, Materials and Manufacturing (ICSMM), Ho-Chi-Minh, Vietnam, February 2015. http://www.joace.org/uploadfile/2015/0529/20150529042946338.pdf
- Bhale Pradeep Kumar, IIIT Gwalior, India
- Bhanu Sharma, Chitkara University, Chandigarh, India
- Bibinur Zhursinbek, AI Department, Kazakh Infocommunications Academy, Astana, Kazakhstan
- Federated Learning Based Smart Horticulture and Smart Storage of Fruits Using E-Nose, and Blockchain: A Proposed Model, 2024 IEEE 3rd International Conference on AI in Cybersecurity (ICAIC), University of Houston, USA
- BS Chowdhry, Mehran University, Sind, Pakistan \
- “Prologue: Recent trends in computer science and engineering (RTCSE)”, 3C Tecnologia. Special Issue, April 2020 https://www.3ciencias.com/wp-content/uploads/2020/04/prologue_ee_3c-tecno_abril-2020-1.pdf
- "Energy Efficient and High Performance FIR Filter Design on Spartan-6FPGA" 3C Tecnologia. Special Issue, May 2019, https://www.3ciencias.com/wp-content/uploads/2019/05/eem17052019_2-1-1.pdf
- IoTs Enable Active Contour Modeling Based Energy Efficient and Thermal Aware Object Tracking on FPGA”, Wireless Personal Communications, 85 (2), pp. 529-543, 2015. https://link.springer.com/article/10.1007/s11277-015-2753-z
- "Mobile DDR IO Standard Based High Performance Energy Efficient Portable ALU Design on FPGA", Wireless Personal Communications, Vol. 76, No. 3, 2014, pp 569-578. https://link.springer.com/article/10.1007/s11277-014-1725-z
- “Frequency, voltage and temperature sensor design for fire detection in VLSI circuit on FPGA”, Communications in Computer and Information Science, Vol. 414, 2013 pp. 121-133 https://link.springer.com/chapter/10.1007/978-3-319-10987-9_12
- Carlos La Rosa, Universidad Nacional Mayor de San Marcos, Lima, Peru
- "Deep Learning Applied to Capacity Control in Commercial Establishments in Times of COVID-19”, 12th International Conference on Computational Intelligence and Communication Networks (CICN), 25-26 September 2020, Bhimtal, India, https://ieeexplore.ieee.org/document/9242584
- Chafloque, Renzo,Universidad Nacional Mayor de San Marcos, Lima, Peru
- "Deep Learning Audio Spectrograms Processing to the Early COVID-19 Detection”, 12th International Conference on Computational Intelligence and Communication Networks (CICN), 25-26 September 2020, Bhimtal, India, https://ieeexplore.ieee.org/document/9242583
- Christian Teodoro, Universidad Nacional Federico Villarreal, Lima, Peru
- “Impact of tourist demand, from COVID-19, on the sustainable Inca infrastructure of Ollantaytambo, Urubamba – Cusco – Peru", The International Conference on Communication Systems and Network Technologies (CSNT-2021), Bhopal, India, IEEE https://ieeexplore.ieee.org/document/9509723/
- Ciro Rodriguez Rodriguez, Facultad de Ingeniería de Sistemas, Universidad Nacional Mayor de San Marcos, Lima, Peru and Facultad de Ingeniería Informatica y Electronica, Universidad Nacional Federico Villarreal, Lima, Peru,
- “E-Learning Influences on Student Learning Satisfaction Levels in Terms of Learner’s Personalization”, Journal of Autonomous Intelligence, Volume 7, Issue 5, May 2024
- “Impact of tourist demand, from COVID-19, on the sustainable Inca infrastructure of Ollantaytambo, Urubamba – Cusco – Peru", The International Conference on Communication Systems and Network Technologies (CSNT-2021), Bhopal, India, IEEE https://ieeexplore.ieee.org/document/9509723/
- "Deep Learning Applied to Capacity Control in Commercial Establishments in Times of COVID-19”, 12th International Conference on Computational Intelligence and Communication Networks (CICN), 25-26 September 2020, Bhimtal, India, https://ieeexplore.ieee.org/document/9242584
- “Environment Friendly FSM Design on Ultrascale Architecture: An Energy Efficient Green Computing Approach”, World Journal of Engineering, 2020, https://www.emerald.com/insight/content/doi/10.1108/WJE-08-2020-0397/full/html
- “Low planting densities for early maturation of Mauritia flexuosa for the sustainable management of plantations in Alto Huallaga, Peru Low planting densities for early maturation of Mauritia flexuosa for the sustainable management of plantations in Alto Huallaga, Peru”, World Journal of Engineering ISSN: 1708-5284 https://www.emerald.com/insight/content/doi/10.1108/WJE-09-2020-0416/full/html
- "Predictive Model for Safe Unconfinement Commercial Environments in Times of COVID-19", Solid State Technology, Vol. 63 No. 1s (2020) http://solidstatetechnology.us/index.php/JSST/article/view/3097
- “Prologue: Recent trends in computer science and engineering (RTCSE)”, 3C Tecnologia. Special Issue, April 2020 https://www.3ciencias.com/wp-content/uploads/2020/04/prologue_ee_3c-tecno_abril-2020-1.pdf
- Daniel Angeles,Universidad Nacional Mayor de San Marcos, Lima, Peru
- "Deep Learning Audio Spectrograms Processing to the Early COVID-19 Detection”, 12th International Conference on Computational Intelligence and Communication Networks (CICN), 25-26 September 2020, Bhimtal, India, https://ieeexplore.ieee.org/document/9242583
- Deepa Singh, ABV-IIITM Gwalior, India
- "Anatomy and utilities of an artificial intelligence conversational entity." In 2015 International Conference on Computational Intelligence and Communication Networks (CICN), pp. 594-597. IEEE, 2015.
- "Low Voltage Digitally Controlled Impedance Based Energy Efficient Vedic Multiplier Design on 28nm FPGA." In 2014 International Conference on Computational Intelligence and Communication Networks, pp. 951-955. IEEE, 2014.
- "Capacitance Based Low Power ALU Design and Implementation on 28nm FPGA." International Journal of Scientific Engineering and Technology 2, no. 6 (2013): 465-468.
- Pandey, Bishwajeet, Deepa Singh, Deepak Baghel, Jyotsana Yadav, and Manisha Pattanaik. "Clock Gated Low Power Memory Implementation on Virtex-6 FPGA." In 2013 5th International Conference and Computational Intelligence and Communication Networks, pp. 409-412. IEEE, 2013.
- "IO standard based low power design of RAM and implementation on FPGA." Journal of Automation and Control Engineering 1, no. 4 (2013).
- "IO standard based green multiplexer design and implementation on FPGA." In 2013 5th International Conference and Computational Intelligence and Communication Networks, pp. 428-431. IEEE, 2013.
- "Performance Evaluation of Backoff Method--Effect of Backoff Factor on Exponential Backoff Algorithm." In 2013 5th International Conference and Computational Intelligence and Communication Networks, pp. 82-86. IEEE, 2013.
- Diana Luque, Universidad Nacional Mayor de San Marcos, Lima, Peru
- "Deep Learning Applied to Capacity Control in Commercial Establishments in Times of COVID-19”, 12th International Conference on Computational Intelligence and Communication Networks (CICN), 25-26 September 2020, Bhimtal, India, https://ieeexplore.ieee.org/document/9242584
- Dias Abildinov, Faculty of Information Technology, Eurasian National University, Astana, Kazakhstan
- Federated Learning Based Smart Horticulture and Smart Storage of Fruits Using E-Nose, and Blockchain: A Proposed Model, 2024 IEEE 3rd International Conference on AI in Cybersecurity (ICAIC), University of Houston, USA
- Dil Muhammad Akbar Hussain, Aalborg University Esbjerg, Esbjerg, Denmark,
- “Energy-efficient implementation of AES algorithm on 16nm FPGA”, The International Conference on Communication Systems and Network Technologies (CSNT-2021), Bhopal, India, IEEE https://ieeexplore.ieee.org/document/9509662/
- “Environment Friendly FSM Design on Ultrascale Architecture: An Energy Efficient Green Computing Approach”, World Journal of Engineering, 2020, https://www.emerald.com/insight/content/doi/10.1108/WJE-08-2020-0397/full/html
- “Energy Efficient Design on 16nm Ultrascale Plus Architecture Using Static Probability and Toggle Rate”, Journal of Computational and Theoretical Nano Sciences
- FSM Based Green Memory Design and its Implementation on Ultrascale Plus FPGA”, Journal of Critical Reviews, ISSN- 2394-5125, Vol. 7, No. 19, pp.454-458, 2020 http://www.jcreview.com/fulltext/197-1594819368.pdf?1596969111
- "Energy Efficient and High Performance FIR Filter Design on Spartan-6FPGA" 3C Tecnologia. Special Issue, May 2019, https://www.3ciencias.com/wp-content/uploads/2019/05/eem17052019_2-1-1.pdf
- “Scaling of Output Load in Energy Efficient FIR Filter for Green Communication on Ultra-Scale FPGA”, Wireless Personal Communications, 2019, Volume 106, No. 4, pp 1813–1826. https://link.springer.com/article/10.1007/s11277-018-5717-2
- “Performance Evaluation of FIR Filter After Implementation on Different FPGA and SOC and Its Utilization in Communication and Network”, Wireless Personal Communications, 2017, Vol.95, No. 2, pp 375–389. https://link.springer.com/article/10.1007/s11277-016-3898-0
- “Heuristic and Statistical Power Estimation Model for FPGA Based Wireless Systems”, Wireless Personal Communications, Vol. 106, pages. 2087–2098, 2019 https://link.springer.com/article/10.1007/s11277-018-5927-7
- “Different I/O Standard and Technology Based Thermal Aware Energy Efficient Vedic Multiplier Design for Green Wireless Communication on FPGA”, Wireless Personal Communications, 2017,Volume 96,No.2,pp 3139–3158. https://link.springer.com/article/10.1007/s11277-017-4345-6
- “Environment Friendly FSM Design on Ultrascale Architecture: An Energy Efficient Green Computing Approach”, World Journal of Engineering, 2020, https://www.emerald.com/insight/content/doi/10.1108/WJE-08-2020-0397/full/html
- “Energy Efficient Design on 16nm Ultrascale Plus Architecture Using Static Probability and Toggle Rate”, Journal of Computational and Theoretical Nano Sciences (Accepted)
- “FSM Based Green Memory Design and its Implementation on Ultrascale Plus FPGA”, Journal of Critical Reviews, ISSN- 2394-5125, Vol. 7, No. 19, pp.454-458, 2020 http://www.jcreview.com/fulltext/197-1594819368.pdf?1596969111
- “Leakage power consumption of address register interfacing with different families of FPGA”, International Journal of Innovative Technology and Exploring Engineering (IJITEE), Vol. 8, Issue- 9S2, July 2019 https://www.ijitee.org/wp-content/uploads/papers/v8i9S2/I11080789S219.pdf
- “Scaling of supply voltage in design of energy saver FIR filter on 28nm FPGA”, International Journal of Control and Automation, 10 (12), pp. 77-88, 2017. http://article.nadiapub.com/IJCA/vol10_no12/7.pdf
- “Clock gating based energy efficient and thermal aware design for Vedic equation solver on 28nm and 40nmFPGA”, International Journal of Control and Automation, 9 (7), 2016, pp. 101-112. http://article.nadiapub.com/IJCA/vol9_no7/10.pdf
- “Leakage power reduction with various IO standards and dynamic voltage scaling in vedic multiplier onvirtex-6 FPGA”, (2016) Indian Journal of Science and Technology, 9 (25), art. no. 97157, 2016. https://indjst.org/articles/leakage-power-reduction-with-various-io-standards-and-dynamic-voltage-scaling-in-vedic-multiplier-on-virtex-6-fpga
- "Power Efficient Frequency Scaled and Thermal-Aware Control Unit Design on FPGA", International Journal of Innovative Technology and Exploring Engineering, Volume-8 Issue-9S2, pp. 530-533, July 2019. https://www.ijitee.org/wp-content/uploads/papers/v8i9S2/I11110789S219.pdf
- “Timing constraints-based high-performance DES design and implementation on 28-nm FPGA”, Advances in Intelligent Systems and Computing, 732, pp. 123-137, 2018. https://link.springer.com/chapter/10.1007/978-981-10-8533-8_13
- “A discussion about upgrading the quick script platform to create natural language based IoT systems”, Indian Journal of Science and Technology, 9 (46), art. no. 106917, 2016. https://indjst.org/articles/a-discussion-about-upgrading-the-quick-script-platform-to-create-natural-language-based-iot-systems
- “FPGA based low power DES algorithm design and implementation using HTML technology”, International Journal of Software Engineering and its Applications, 10 (6), pp. 81-92, 2016. https://www.scopus.com/sourceid/21100199850
- “HSTL IO standard based energy efficient multiplier design using Nikhilam navatashcaramam dashatah on 28nm FPGA”, International Journal of Control and Automation, 8 (8), 2015, pp. 35-44. http://article.nadiapub.com/IJCA/vol8_no8/5.pdf
- “Leakage Power Consumption of Address Register Interfacing with Different Families of FPGA”, 5th International Conference on Green Computing and Engineering Technologies (ICGCET), 17-19 September 2019, Hotel Diwan, 31 Boulevard Hassan Seghir, Casablanca 20000, Morocco. http://icgcet.org/ICGCET_2019.pdf
- “Energy Efficient and High Performance FIR Filter Design on Spartan-6 FPGA”, 2nd International Multi-Topic Conference on Engineering and Science (IMCES'19), 05-07 May 2019, Holiday Inn Mauritius Mon Tresor , Mon Tresor, Plaine Magnien, Mauritius. http://imces.tech/IMCES_2019.pdf
- “Frequency Scaling and High Speed Transceiver Logic Based Low Power UART design on 45nm FPGA”, 11th International Conference on Computational Intelligence and Communication Networks (CICN), January 2019, Honolulu, HI, USA, https://ieeexplore.ieee.org/document/8902375
- "Role of Scaling of Frequency and Toggle Rate in POD IO Standards Based Energy Efficient ALU Design on Ultra Scale FPGA", 10th International Conference on Computational Intelligence and Communication Networks (CICN), Esbjerg, Denmark, 2018, pp. 50-53. https://ieeexplore.ieee.org/document/8864933
- “Scaling of Supply Voltage in Design of Energy Saver FIR Filter on 28nm FPGA”, 3rd International conference on Recent Trends in Computer Science and Electronics Engineering (RTCSE'18), 02-03 January 2018, Bangkok, Thailand http://www.rtcse.org/RTCSE_2018.pdf
- “Reduction in Power Consumption of Packet Counter on VIRTEX-6 FPGA by Frequency Scaling”, IEEE Saudi Arabia Smart Grid Conference (SASG 2017), 12th - 14th Dec, 2017, Jeddah Hilton Hotel, Jeddah, Saudi Arabia. https://ieeexplore.ieee.org/document/8356479
- “Stack Memory Implementation and Analysis of Timing Constraint, Power and Memory using FPGA”, IEEE 9th International Conference on Computational Intelligence and Communication Networks (CICN), 16-17 Sep 2017, Final International University, Cyprus. https://ieeexplore.ieee.org/document/8319388
- “A Discussion about Upgrading the Quick Script Platform to Create Natural Language based IoT Systems”, 2nd International Conference on Recent Trends in Computer Science and Electronics (RTCSE), 02-03 January 2017, Kuala Lumpur, Malaysia http://rtcse.org/RTCSE_2017.pdf
- “Power Analysis of Energy Efficient des Algorithm and Implementation on 28nm FPGA”, IEEE 15th International Symposium on Distributed Computing and Applications to Business, Engineering and Science (DCABES), 24-26 August 2016, Paris, France http://ieeexplore.ieee.org/document/7982309/
- “SSTL Based Thermal and Power Efficient RAM Design on 28nm FPGA for Spacecraft”, IEEE 2016 International Conference on Smart Grid and Clean Energy Technologies, 19-22 October 2016, University of Electronic Science and Technology of China (UESTC), Chengsu, China. http://ieeexplore.ieee.org/document/7876075/
- “GTL Based Internet of Things Enable Processor Specific RAM Design on 65nm FPGA”, IEEE 57th International Symposium ELMAR-2015. 28-30 September 2015, Zadar, Croatia: the oldest conference in Europe. https://ieeexplore.ieee.org/document/7334514
- “Pseudo Open Drain IO Standard Based Energy Efficient Solar Charge Sensor Design on 20nm FPGA”, 11th IEEE International Conference on Power Electronics and Drive Systems (PEDS), Sydney, Australia, 9 – 12 June 2015. https://ieeexplore.ieee.org/document/7203530
- "LVTTL Based Energy Efficient Watermark Generator Design and Implementation on FPGA", IEEE International Conference on ICT Convergence (ICTC), 22-24 October 2014, Busan, Korea, https://ieeexplore.ieee.org/document/6983240
- “Ambient Temperature Based Thermal Aware Energy Efficient ROM Design on FPGA”, Scopus 4th International Conference on Advanced Materials and Engineering Materials (ICAMEM), 19-20 October 2014, Hong Kong. http://www.scientific.net/AMR.1082.467
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